Senior FPGA Developer - 12636

This post is also available in: Svenska (Swedish)

Assignment Description:

We are looking for a Senior FPGA Developer to join our dynamic team.

What you will work on

Perform synthesis and implementation for FPGA and ASIC designs
Design and verify RTL using SystemVerilog or VHDL
Develop and integrate IP blocks into larger systems
Contribute to top-level integration and system-level validation
Collaborate within agile teams, supporting continuous integration and delivery workflows
Apply scripting to automate design and verification tasks
Work closely with cross-functional teams, maintaining clear and effective communication

What you bring

Proven experience in RTL design and verification for FPGA/ASIC
Strong proficiency in SystemVerilog or VHDL
Hands-on experience in synthesis and implementation processes
Background in IP design and development
Familiarity with UVM-based verification methodologies
Experience with top-level integration and debugging
Understanding of CI/CD practices in an agile environment
Proficiency in version control tools, especially Git
Experience with scripting languages such as TCL, Python, Perl, Cshell, or Bash
Strong interpersonal and communication skills, with the ability to work well in collaborative settings
Swedish citizenship, as the role requires security clearance and background checks

If this sounds interesting, please send your CV to cv@veritaz.se

Senior FPGA Developer – 12636