This post is also available in: English (Engelska)

Assignment Description:

We are looking for a Senior ASIC Verification Engineer to join our dynamic team.

What you will work on:

• Develop and implement verification environments and test-benches from scratch.
• Design and update test cases to ensure comprehensive functional and performance validation.
• Develop and enhance test-bench components, including verification IPs (VIPs).
• Integrate third-party VIPs into existing environments.
• Implement assertions and coverage models to ensure high-quality verification.
• Collaborate closely with design and verification teams to identify and resolve functional or integration issues.
• Contribute to continuous improvement of verification methodologies, tools, and processes.

What you bring:

• Proven experience as an ASIC Verification Engineer/Designer with a strong understanding of verification methodologies.
• Solid hands-on experience in developing tests, test-benches, and verification components from scratch.
• Expertise in SystemVerilog, UVM, and industry-standard verification tools and simulators.
• Experience with assertion-based verification and functional coverage implementation.
• Ability to integrate and customize third-party VIPs effectively.
• Strong analytical and problem-solving skills with attention to detail.
• Excellent communication and teamwork skills, with the ability to work in a collaborative engineering environment.
• Willingness to relocate to Sweden (preferred), or work remotely for the right candidate.

If this sounds interesting, please send your CV to cv@veritaz.se